隨著手勢辨識技術在多媒體娛樂和智慧家電控制等領域的廣泛應用，隱私保護和低延遲推論速度已成為提升用戶體驗的關鍵因素。邊緣計算，由於其能在本地設備上即時處理數據，強化了數據的隱私保護並顯著減少數據傳輸和處理的延時，因而被重視。
本研究開發的智慧手套手勢辨識系統採用開源的RISC-V指令集架構SoC，並在FPGA平台上實現了低成本及高效能的部署。透過整合Gemmini硬體加速器，本系統顯著提升了邊緣設備的計算效能及模型的推論速度。
實驗結果顯示，配備硬體加速器的SoC相較於未搭載加速器的SoC，推論速度提升達55倍，同時維持了手勢識別的高準確度。該邊緣系統的實施不僅確保了用戶數據的安全，也通過硬體加速器顯著降低了推論時間，進一步提升了用戶體驗。本研究證明了開源技術和硬體加速器在邊緣計算領域的有效性，為未來智慧裝置的技術進步提供了一個經濟且高效的解決方案。

[1] V. Leon, P. Minaidis, G. Lentaris, and D. Soudris, “Accelerating AI and computer vision for satellite pose estimation on the Intel Myriad X embedded SOC,” Microprocessors and Microsystems, vol. 103, Nov. 2023.doi: 10.1016/j.micpro.2023.104947.
[2] J. Sengupta, R. Kubendran, E. Neftci and A. Andreou, “High-Speed, Real-Time, Spike-Based Object Tracking and Path Prediction on Google Edge TPU,” 2020 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS). IEEE, AUG. 2020. pp. 134-135.doi: 10.1109/aicas48895.2020.9073867.
[3] H. Genc et al., “Gemmini: Enabling Systematic Deep-Learning Architecture Evaluation via Full-Stack Integration,” 2021 58th ACM/IEEE Design Automation Conference (DAC), San Francisco, CA, USA, 2021, pp. 1-6. doi: 10.1109/DAC18074.2021.9586216.
[4] F. Farshchi, Q. Huang and H. Yun, “Integrating NVIDIA Deep Learning Accelerator (NVDLA) with RISC-V SoC on FireSim, ” 2019 2nd Workshop on Energy Efficient Machine Learning and Cognitive Computing for Embedded Applications (EMC2), Washington, DC, USA, 2019, pp. 21-25. doi: 10.1109/EMC249363.2019.00012.
[5] A. Amid et al., “Chipyard: Integrated Design, Simulation, and Implementation Framework for Custom SoCs,” IEEE Micro, vol. 40, no. 4, pp. 10–21, Jul. 2020. doi: 10.1109/MM.2020.2996616.
[6] J. Bachrach et al., “Chisel: Constructing hardware in a Scala embedded language, ” DAC Design Automation Conference 2012, San Francisco, CA, USA, 2012, pp. 1212-1221.doi: 10.1145/2228360.2228584.
[7] A. Izraelevitz et al., “Reusability is FIRRTL ground: Hardware construction languages, compiler frameworks, and transformations,” 2017 IEEE/ACM International Conference-on-Computer-Aided Design (ICCAD), Nov. 2017.doi: 10.1109/iccad.2017.8203780.
[8] C. Y. Tsai, “Implementation of 1-D Convolution in Systolic Array based on RISC-V Architecture”, National Taiwan Normal University, July. 2022,
[9] S. Y. Lin, “Design and Implementation of a Glove-Based Gesture Recognition System Using Digital Flex Sensors and Deep Learning,” National Taiwan Normal University, Aug. 2024.
[10] S. Ioffe and C. Szegedy, “Batch normalization: Accelerating deep network training by reducing internal covariate shift,” arXiv, Feb. 11, 2015.doi: 10.48550/arXiv.1502.03167.
[11] R. Li, Y. Wang, F. Liang, H. Qin, J. Yan and R. Fan, "Fully Quantized Network for Object Detection," 2019 IEEE/CVF Conference on Computer Vision and Pattern Recognition (CVPR), 2019, pp. 2805-2814.doi: 10.1109/CVPR.2019.00292.
[12] Y. Li et al., “BRECQ: Pushing the Limit of Post-Training Quantization by Block Reconstruction,” arXiv, Jul. 25, 2021.doi: 10.48550/arXiv.2102.05426.