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研究生: 沈宗懋
論文名稱: 以FPGA實現非監督式Fuzzy c-means分群演算法之硬體架構設計
Hardware Circuit Design of Unsupervised Fuzzy c-means Clustering Algorithm Implemented on FPGA
指導教授: 黃文吉
學位類別: 碩士
Master
系所名稱: 資訊工程學系
Department of Computer Science and Information Engineering
論文出版年: 2011
畢業學年度: 99
語文別: 中文
論文頁數: 62
中文關鍵詞: 資料分群可程式化系統晶片群集有效性指標
英文關鍵詞: Fuzzy c-means, FPGA
論文種類: 學術論文
相關次數: 點閱:145下載:6
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  • Fuzzy c-means演算法是一個非常常見的分群演算法,但是因在計算分群之前必須給定分群數,然而我們不能知道哪個分群結果是最好的,是屬於一種監督式的演算法。基於這個理由本論文提出了一個完全非監督式的Fuzzy c-means分群演算法(Unsupervised Fuzzy c-means Clustering Algorithm)並且實現其硬體電路架構,當Fuzzy c-means運算收斂結束,利用Xie和Beni所提出的群集有效性指標(Cluster Validity Index)來驗證分群的有效性,並且選擇出最佳的分群數目。在對於分群演算法的更新計算質量中心以及更新權重矩陣這兩個步驟在本電路裡整合為單一個更新步驟,來減少使用的儲存空間。並且藉由管線化來實現運作,可利用較低的資源得到更快的計算速度。
    最後我們所提出的架構會在以FPGA(Field Programmable Gate Array)為基礎的可程式化晶片設計(System On a Programmable Chip , SOPC)之平台上做實際的驗證測試,經由數據結果的測試與比對可以發現本論文中的架構可以辨認出最適合的分群結果,達到非監督化。

    附圖目錄 ............................................................................................v 附表目錄 .........................................................................................viii 第一章 緒論 ....................................................................................1 1.1 研究背景 ....................................................................................1 1.2 研究動機與目的 ....................................................................3 1.3 全文架構 ....................................................................................5 第二章 基礎理論與技術背景 ............................................................6 2.1 Fuzzy c-means分群演算法 ....................................................6 2.2 Xie and Beni分群有效性指標 ............................................10 2.3 FPGA系統整合設計 ................................................................12 第三章 基礎電路架構介紹 ..........................................................14 3.1 架構介紹 ..........................................................................14 3.2 電路單元:Pre-Computation Unit ..........................16 3.3 電路單元:Membership Coefficients Updating Unit ..18 3.4 電路單元:Centroid Updating Unit ..................................20 3.5 電路單元:Cost Function Computation Unit ..................23 3.6 電路單元:On-Chip Centroid RAM ..................................24 3.7 電路單元:Xie-Beni Index Computation Unit ............25 3.8 電路單元:Control Unit ..................................................34 第四章 實驗結果與數據探討 ..........................................................37 4.1 開發平台與實驗環境介紹 ..................................................37 4.2 實驗數據的呈現與討論 ..........................................................41 4.2.1 影像分割效果比較與驗證 ..................................................41 4.2.2 硬體架構與軟體演算法效能之量測 ..................................53 第五章 結論 ..................................................................................60 參考著作 ..........................................................................................61

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