進階加密演算法AES(Advanced Encryption Standard)針對縮小面積與提升速率之研究被廣泛的討論。
本研究主要分成三個部份，首先為設計8-bit AES硬體電路架構，以移位暫存器的方式去實現ShiftRows運算區塊，減少BRAM的使用，再以共享的方式實現MixColumns與InvMixColumns，減少Slices的使用量，達到小面積與高產能兼顧的效果。第二部分主要研究以AES為主的加密模式，在五種工作模式，ECB mode、CBC mode、CFB mode、OFB mode與CTR mode底下，對音訊進行加密，並且分析比較在不同的工作模組下，其中的優缺點。第三部份著重在將AES與8-bit的PicoBlaze微處理器做整合，配合UART傳輸協定，透過RS232連接電腦端與FPGA實驗版，再以PicoBlaze微處理器控制AES的加密運算，最後由電腦端的超級終端機上呈現加密的結果。
在工具上的使用，主要為Xilinx公司所提供的軟體ISE9.2i與ISE10.1版，並且利用Spartan-3AN XC3S700AN 晶片中的PicoBlaze微處理器來達成嵌入式加解密系統，最後利用Matlab軟體設計的圖型使用者介面將音訊加解密結果完整呈現。

This paper is focusing on the 8-bit AES system realization through the hardware/software co-design. First, an 8-bit AES hardware circuit is designed by using shift registers to perform ShiftRows in order to reduce the use of BRAMs. Furthermore, by applying the shared circuits in MixColumns and InvMixColumns, the slice-area is reduced. The second part of the paper focuses on AES operation modes including ECB, CBC, CFB, OFB and CTR. This research analyzes and compares the advantages and disadvantages of the different operation modes in audio AES encryption/decryption. The third part focuses on the integration of AES and the 8-bit PicoBlaze microcontroller. By using the UART transfer protocol and the RS232 interface to connect the computer system and the FPGA board. PicoBlaze micro-controller is then used to control the AES operations and display the operation results through the Hyper-terminal on the PC.
The system implementation is based on Xilinx ISE9.2i and ISE10.1 and the PicoBlaze microcontroller embedded in the Spartan-3AN XC3S700AN for encryption/decryption. Matlab is used to display the encryption/decryption results through the graphics user interface.

[1] National Bureau of Standards, “Data Encryption Standard. Federal Information Processing Standards Processing Standards Publication， FIPS PUB 46, January 1977.
[2] NIST. Institute of Standards and Technology, “Specification for the Data encryption Standard(DES),” FIPS PUB46-3, October 1999.
[3] Advanced Encryption Standard (AES) (in National Institute of Standards and Technology [NIST]), Federal Information Processing Standards (FIPS) Pub. 197, Nov. 2001.
[4] William Stallings, Cryptography and Network Security: Principles and Practice. Prentice Hall, 1999.
[5] Kuo-Huang Chang, Yi-Cheng Chen, Chung-Cheng Hsieh, Chi-Wu Huang and Chi-Jeng Chang1, “Embedded a Low Area 32-bit AES for Image Encryption/Decryption Application,” IEEE ISCAS 2009, pp. 1922–1925, May 2009.
[6] Chi-Jeng Chang, Chi-Wu Huang, Kuo-Huang Chang, Yi-Cheng Chen and Chung-Cheng Hsieh1, “High Throughput 32-bit AES Implementation in FPGA,” IEEE APCCAS 2008, pp. 1806–1809, Nov.30-Dec.3 2008.
[7] P. Chodowiec and K. Gaj, “Very Compact FPGA Implementation of the AES Algorithm,” CHES 2003, Vol. 2779, September 2003.
[8] G. Rouvroy, F.-X. Standaert, J.-J. Quisquater and J.-D.Legat, “Compact and efficient encryption/decryption module for FPGA implementation of the AES Rijndael very well suited for small embedded applications,” ITCC 2004, Vol. 02, pp. 583-587, August 2004.
[9] T. Good and M. Benaissa, "Very small FPGA application-specificinstruction processor for AES," IEEE Trans. Circuit and System, Vol. 53, no. 7, pp. 1477-1486, July 2006.
[10] Chi-Jeng Chang, Chi-Wu Huang, Hung-Yun Tai, Mao-Yuan Lin, “8-bit AES Implementation in FPGA by Multiplexing 32-bit AES Operation,” ISDPE 2007, pp. 505–507, November 2007.
[11] X. Zhang and K. K.Parhi “High Speed VLSI Architectures for the AES Algorithm,” IEEE Transactions on Large Scale Integration(VLSI) SYSTEMS, Vol. 12, no.9 , pp 957-967, September 2004.
[12] Rafael C. Gonzalez and Richard E. Woods, “ Digital Image Processing, 2/E,” Prentice Hall, 2001.
[13] Morris Dworkin, “Recommendation for Block Cipher Modes of Operation” NIST Special Publication 800-38A 2001 Edition.
[14] Chi-Wu Huang, Che-Hao Chiang, Chien-Lun Yen, Yi-Cheng Chen, Kuo-Huang Chang and Chi-Jeng Chang, “The AES Application in Image Using Different Operation Modes,” IEEE ICIEA 2010, pp. 393–398, June.15-June.17 2010.
[15] Thomas F. Quatieri, “Discrete-time speech signal processing principles and practice,” Prentice Hall PTR, 2002.
[16] Paul Masri, Prof. Andrew Bateman, “Identification of Nonstationary Audio Signals Using the FFT, with Application to Analysis-based Synthesis of Sound,” Published by Institute of Electrical Engineers (IEE), May 1995, London. Digest No. 1995/089.
[17] Ken Chapman Xilinx Ltd, “PicoBlaze KCPSM”.
[18] Ken Chapman Xilinx Ltd, “UART Transmitter and Receiver Macros”.