研究生: |
謝忠政 Chung-Cheng Hsieh |
---|---|
論文名稱: |
用FPGA實現之AES在音訊上的應用 A Dedicated AES System Application in Audio Signals Using FPGA |
指導教授: |
何宏發
Ho, Hong-Fa 黃奇武 Huang, Chi-Wu |
學位類別: |
碩士 Master |
系所名稱: |
電機工程學系 Department of Electrical Engineering |
論文出版年: | 2010 |
畢業學年度: | 98 |
語文別: | 中文 |
論文頁數: | 83 |
中文關鍵詞: | 高等加密標準 、現場可程式化閘陣列 、音訊 、即時 |
英文關鍵詞: | AES, FPGA, Embedded System, Audio, Real time |
論文種類: | 學術論文 |
相關次數: | 點閱:185 下載:16 |
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現今通訊系統之發達,使得人與人之間的溝通可以透過即時的通訊裝置如電話、手機乃至於電腦上之即時串流如會議系統、Skype…等,即可達到無時差的即時溝通,使得不論一般生活上的溝通乃至於商業活動、軍事通訊、政府機關等的溝通更加方便。然而方便的即時溝通環境和設備,但如果是必須保密的祕密通訊如商業、軍事或政府重大的機密決策等,通訊的安全就是首要的任務。
本文主要在於實現更安全的音訊加密方式,實現方式為在周邊的硬體界面上設計了類比轉數位的轉換電路,可將由外界輸入之類比音訊轉換為數位音源,此轉換後的數位資料將是加密的基礎。之後在遠端的周邊上設計一數位轉類比的硬體電路,此可將加密過後或解密後的音訊由後端的喇叭輸出而聽到加密或解密的聲音變化。
而主要實現音訊間的加∕解密系統,將採用進階加密標準(Advanced Encryption Standard,AES)演算法,並以其128位元的架構來實現,其中包括直接連線的移列轉換(ShiftRow)、並利用晶片內建的Block RAM來放置整合資料,完成位元組替換(SubByte)與混行運算(MixColumn)的動作以及存放金鑰擴展(KeyExpansion),來節省電路面積。
For the communication system development rapidly nowadays, people communicate each other by immediate communication devices such as telephone, mobile and computer system which is the streaming system or the Skype software etc. These devices and software systems may accomplish the goal of immediate communication without time lag. It means that they provide convenience not only daily life but also business activities, military communication and government business. The first important mission is secure communication if they are involved in the secure decision levels in the business, military and government systems.
The main goal of this report achieves a model of a secure immediate voice communication. The approach of achievement is by the design of analog to digital (A/D) converters in the hardware interface of peripherals. It converts analog voice signals of outside to digital voice signals. It is the basic information of encryption by the transformation from signals to digital data. Moreover, we may design a digital to analog (D/A) converters of hardware in the backend of peripherals and people can hear the variation of voices which are in the process of encryption and decryption by the end output of speakers.
It uses the Advanced Encryption Standard (AES) Algorithm which is base on the architecture of 128 bits to archive the immediate voice encryption and decryption system. The system includes the direct connection of link ShiftRow, the Block RAM which is built in chipset and put all integrated information data, the execution of the SubByte, the MixColumn and the storage of the Key Expansion to reduce the space of circuit.
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