簡易檢索 / 詳目顯示

研究生: 張靖
Chang, Ching
論文名稱: 鐵電氧化鉿鋯於環繞式閘極電晶體(GAA)及用於疊接氮化鎵高電子遷移率電晶體(HEMT)
Ferroelectric HfZrO2 for GAA-FET and GaN HEMT Cascode Application
指導教授: 李敏鴻
學位類別: 碩士
Master
系所名稱: 光電工程研究所
Graduate Institute of Electro-Optical Engineering
論文出版年: 2020
畢業學年度: 108
語文別: 中文
論文頁數: 53
中文關鍵詞: 鰭式電晶體環繞式閘極電晶體次臨界擺幅
英文關鍵詞: FinFET, GAA FET, Sub-threshold swing
DOI URL: http://doi.org/10.6345/NTNU202001318
論文種類: 學術論文
相關次數: 點閱:208下載:0
分享至:
查詢本校圖書館目錄 查詢臺灣博碩士論文知識加值系統 勘誤回報
  • 近年來隨著智慧型手機、物聯網(IoT)的發展,元件都必須具有體積小、高效能等特點,目前可以透過鰭式電晶體、環繞式閘極電晶體等多閘極電晶體,使閘極能夠有效控制元件,降低漏電流,解決元件尺寸持續微縮,所造成的短通道效應,以延續摩爾定律(Moore’s Law);5G通訊、電動車發展之下,功率元件需求大增,由於氮化鎵材料耐高溫高壓,並且具有的極高電子遷移率和寬能隙等特性相當符合功率元件使用。
    本論文分為三個部分,第一部分實驗,在矽基板上堆疊二氧化矽和多晶矽用來取代 SOI 晶圓以降低成本,並以鐵電材料Hf1-xZrxO2 (HZO) 作為介電層,其中介電層分為兩種,一種為單層Hf0.5Zr0.5O2 ,另一種以2層Hf0.5Zr0.5O2 夾著Al2O3 ,應用於環繞式閘極電晶體,進行 Endurance和Retention量測。第二部分探討GaN 高電子遷移率電晶體(HEMT)的元件特性。最後一部分將鐵電電晶體與氮化鎵HEMT疊接,利用鐵電材料之負電容效應,改善次臨界擺幅(SS),並且提升臨界電壓,使氮化鎵HEMT變為增強型(E-mode),讓此疊接電路同時具備氮化鎵HEMT和鐵電電晶體之特性。

    In recent years, with the development of smartphones and the Internet of Things (IoT), devices must have the characteristics of small size and high performance. The development of multi-gate transistors, such as FinFET and GAAFET, may benefit the well gate control and reduce the short-channel effect with minimizing leakage current for scaling down feature size of the device. With the development of 5G communication and electric vehicles, the demand for power devices has increased greatly. Because the gallium nitride material can withstand high voltage and high temperature, it has extremely high electron mobility and wide energy gap are quite in line with the use of power devices.
    This thesis is divided into three parts: Firstly, ferroelectric Hf1-xZrxO2(HZO) as gate insulator integrated with GAAFET is performed. Stacking SiO2 and Poly-Si on the Si substrate to replace SOI wafer has an advantage of cost reduction. The measurement of endurance and retention are carried out for single and double HZO GAAFET. Then, AlGaN/GaN HEMT (high electron mobility transistors) are discussed in the second part. Finally﹐by employing a cascaded structure﹐the D-mode GaN HEMT can be combined with HZO negative capacitance Si-FET to present steep slope and normally-off characteristics.

    Publication I 期刊論文 I 研討會論文 I 中文摘要 III Abstract IV 致謝 V 目錄 VI 圖目錄 IX 表目錄 XI 第一章 緒論 1 1-1 多閘極電晶體簡介 1 1-2 鐵電材料簡介 4 第二章 8 2-1 實驗動機 8 2-2 鐵電環繞式閘極電晶體製程 9 2-2-1晶圓清洗和爐管沉積 9 2-2-2元件通道製程 10 2-2-3乾式蝕刻和Trimming 薄光阻 12 2-2-4熱氧化消耗元件通道 14 2-2-5沉積High-K介電層 14 2-2-6閘極製程 15 2-2-7快速熱退火 16 2-3 鐵電環繞式閘極電晶體分析和電性量測 18 2-3-1結構分析 18 2-3-2 IDS-VGS量測 21 2-2-3 Endurance 量測 24 2-2-3 Retention量測 25 2-4 結果討論 26 第三章 氮化鎵HEMT元件 27 3-1 簡介 27 3-1-1 氮化鎵簡介 27 3-1-2 氮化鎵磊晶簡介 28 3-1-3 氮化鎵材料特性 29 3-2 氮化鎵高電子遷移率電晶體(HEMT)製程 32 3-2-1 試片雷射切割 32 3-2-2 試片表面清潔 32 3-2-3 黃光製程 32 3-2-4 金屬電極製程 33 3-2-5 閘極製程 33 3-3 氮化鎵元件分析和電性量測 35 3-4 結果討論 37 第四章 鐵電電晶體疊接於氮化鎵HEMT 38 4-1 簡介 38 4-1.1 氮化鎵元件臨界電壓簡介 38 4-1.2 鐵電材料之負電容效應簡介 41 4-2 氮化鎵元件疊接電性量測 43 4-3結果討論 47 第五章 48 5-1總結 48 5-2 未來工作 49 參考資料 50

    [1] D. Hisamoto, W. C. Lee, J. Kedzierski, H. Takeuchi, K. Asano, C. Kuo, T.-J. King, J. Bokor, and C. Hu, “FinFET—A self-aligned double-gate MOSFET scalable beyond 20 nm, ” IEEE Trans. on Electron Device, vol. 47, no.12, pp. 2320-2325, 2000.
    [2] N. Loubet, T. Hook, P. Montanini, C. W. Yeung, S. Kanakasabapathy, M. Guillorn, T. Yamashita, J. Zhang, X. Miao, J. Wang, A. Young, R. Chao, M. Kang, Z. Liu, S. Fan, B. Hamieh, S. Sieg, Y. Mignot, W. Xu, S. C. Seo, J. Yoo, S. Mochizuki, M. Sankarapandian, O. Kwon, A. Carr, A. Greene, Y. Park, J. Frougier, R. Galatage, R. Bao, J. Shearer, R. Conti, H. Song, D. Lee, D. Kong, Y. Xu, A. Arceo, Z. Bi, P. Xu, R. Muthinti, J. Li, R. Wong, D. Brown, P. Oldiges, R. Robison, J. Arnold, N. Felix, S. Skordas, J. Gaudiello, T. Standaert, H. Jagannathan, D. Corliss, M.-H. Na, A. Knorr, T. Wu, D. Gupta, S. Lian, R. Divakaruni, T. Gow, C. Labelle, S. Lee, V. Paruchuri, H. Bu, and M. Khare, “Stacked Nanosheet Gate-All-Around Transistor to Enable Scaling Beyond FinFET, ” in VLSI Technology Symp., 2017, pp. 230-231.
    [3] R. Loo, A. Y. Hikavyy, L. Witters, A. Schulze, H. Arimura, D. Cott, J. Mitard, C. Porret, H. Mertens, P. Ryan, J. Wall, K. Matney, M. Wormington, P. Favia, O. Richard, H. Bender, A. Thean, N. Horiguchi, D. Mocuta and N. Collaert, “Processing 66 Technologies for Advanced Ge Devices, ” ECS J. Solid State Sci. Technol., vol. 6, no. 1, pp. 14-20, 2017.
    [4] I. Chilibon, and J. Marat-Mendes, “Ferroelectric ceramics by sol-gel methods and applications: a review,” Journal of Sol-Gel Science and Technology, vol. 64, no. 3, pp. 571-611, Dec 2012.
    [5] J. Müller, E. Yurchuk, T. Schlösser, J. Paul, R. Hoffmann, S. Müller, D. Martin, S. Slesazeck, P. Polakowski, J. Sundqvist, M. Czernohorsky, K. Seidel, P. Kücher, R. Boschke, M. Trentzsch, K. Gebauer, U. Schröder and T. Mikolajick, “Ferroelectricity in HfO2 Enables Nonvolatile Data Storage in 28 nm HKMG, ’’ in VLSI Technology Symp., 2012, pp. 25-26.
    [6] K. Ni, M. Jerry, J. A. Smith, and S. Datta, “A Circuit Compatible Accurate Compact Model for Ferroelectric-FETs,” in VLSI Technology Symp., 2018, pp. 131-132.
    [7] K. S. Li, P. G. Chen, T. Y. Lai, C. H. Lin, C. C. Cheng, C. C. Chen, Y. J. Wei, Y. F. Hou, M. H. Liao, M. H. Lee, M. C. Chen, J. M. Sheih, W. K. Yeh, F. L. Yang, “Sub-60mV-Swing Negative-Capacitance FinFET without Hysteresis, ” in IEDM Tech. Dig , 2015, pp.620-623.
    [8] M. H. Lee, K. T. Chen, C. Y. Liao, S. S. Gu, G. Y. Siang, Y. C. Chou, H. Y. Chen, J. Le, R. C. Hong, Z. Y. Wang, S. Y. Chen, P. G. Chen, M. Tang, Y. D. Lin, H. Y. Lee, K. S. Li, and C. W. Liu, “Extremely Steep Switch of Negative-Capacitance Nanosheet GAA-FETs and FinFETs, ” Technical Digest, in IEDM Tech., 2018, pp. 735-738.
    [9] P. Javorka, A. Alam, M. Wolter, A. Fox, M. Marso, M. Heuken, H. Luth, and P. Kordos, “AlGaN/GaN HEMTs on (111) silicon substrates, ” IEEE Electron Device Letters, vol. 23, no. 1, pp. 4-6, 2002.
    [10] R. T. Kemerley, H. B. Wallace, and M. N. Yoder, “Impact of wide bandgap microwave devices on DoD systems, ” Proceedings of the IEEE, vol. 90, no. 6, pp. 1059-1064, 2002
    [11] F. Sacconi, A. Di Carlo, P. Lugli, and H. Morkoc, “Spontaneous and piezoelectric polarization effects on the output characteristics of AlGaN/GaN heterojunction modulation doped FETs, ” IEEE Transactions on Electron Devices, vol. 48, no. 3, pp. 450-457, 2001.
    [12] P. Javorka, “Fabrication and Characterization of AIGaN/GaN High Electron Mobility Transistors, ” Feb 2004. RWTH Aachen university
    [13] Yasuhiro Uemoto, Masahiro Hikita, Hiroaki Ueno, Hisayoshi Matsuo, Hidetoshi Ishida, “Gate Injection Transistor (GIT)—A Normally-Off AlGaN/GaN Power Transistor Using Conductivity Modulation, ” IEEE Electron Device Lett, VOL. 54, NO.12, pp.3393-3399, Dec 2007
    [14] Jie Ren, Chak Wah Tang, Hao Feng, Huaxing Jiang, Wentao Yang, Xianda Zhou, Kei May Lau, and Johnny K.O. Sin“Experimental Characterization of the Fully Integrated Si-GaN Cascoded FET” Proceedings of the 30th International Symposium on Power Semiconductor Devices & ICs, May 2018
    [15] S. Salahuddin, and S. Datta, “Can the Subthreshold Swing in a Classical FET be Lowered Below 60 mV/decade, ” in IEDM Tech. Dig, Dec 2008, pp. 693-696.
    [16] N. Okamoto, K. Hoshino, N. Hara, M. Takikawa, Y. Arakawa,” MOCVD-grown InGaN-channel HEMT structures with electron mobility of over 1000 cm2/Vs,” Journal of Crystal Growth, Volume 272, pp. 278–284, Dec 2004
    [17] O. Ambacher, B. Foutz, J. Smart, J. R. Shealy, N. G. Weimann, K. Chu, M. Murphy,A. J. Sierakowski, W. J. Schaff, L. F. Eastman,” Two dimensional electron gases induced by spontaneous and piezoelectric polarization in undoped and doped AlGaN/GaN heterostructures,” Journal of Applied Physics, VOL. 87, NO. 1, pp.334-344, Jan 2000
    [18] J. Kuzmik, “ Power Electronics on InAlN/(In)GAN: Prospect for a record performance” , IEEE Elec. Dev. Lett. Vol. 22, No. 114, pp. 510-512, 2001
    [19] Yong Cai, Yugang Zhou, Kei May Lau, and Kevin J. Chen, “Control of Threshold Voltage of AlGaN/GaN HEMTs by Fluoride-Based Plasma Treatment:From Depletion Mode to Enhancement Mode,” IEEE trans. on Electron Device, vol. 53, no.9, pp.2207-2215, Sep 2006
    [20] Tadjer. M.J., Mastro. M.A., Hite. J.K., Hobart. K.D., Eddy. C.R., Kub. F.J., “An AlN/Ultrathin AlGaN/GaN HEMT Structure for Enhancement-Mode Operation Using Selective Etching,” IEEE Electron Device Lett., vol. 30, no. 12, pp. 1251-1253, February, Dec. 2009
    [21] Takashi Egawa, “ Heteroepitaxial growth and power electronics using AlGaN/GaN HEMT on Si, ” in IEDM Tech. 2012, pp.27.1.1-27.1.4

    無法下載圖示 本全文未授權公開
    QR CODE