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研究生: 涂英豪
論文名稱: 基於FPGA嵌入式Linux系統於32-bit AES應用之研究與實現
Based on FPGA Embedded Linux Systems In 32-bit AES Application of Research and Implementation
指導教授: 黃奇武
Huang, Chi-Wu
張吉正
Chang, Chi-Jeng
學位類別: 碩士
Master
系所名稱: 工業教育學系
Department of Industrial Education
論文出版年: 2011
畢業學年度: 99
語文別: 中文
論文頁數: 66
中文關鍵詞: 高等加密標準嵌入式作業系統現場可程式化的閘陣列網路檔案系統
英文關鍵詞: AES, Embedded Linux System, FPGA, NFS
論文種類: 學術論文
相關次數: 點閱:217下載:9
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  • 高等加密標準(Advanced Encryption Standard, AES)在演算法上被廣泛的研究,實際上實現於平台的情況不多,本研究將AES結合嵌入式Linux系統透過網路傳輸實作出來,並應用於影像轉換,與系統加速。
      本研究先利用C#物件導向軟體撰寫AES演算法,透過此方式做學習與驗證AES運算流程,並建立一套完整AES應用平台,包含文字、影像和聲音的應用。除了C#軟體驗證平台以外,本研究還著重將AES實作於嵌入式作業系統環境,將32位元小面積AES硬體架構,利用現場可程式化的閘陣列(FPGA)實作出AES嵌入式Linux系統,並利用此架構實現影像加解密應用。此架構利用作業系統以解決前人在傳輸速度過慢與記憶體空間的限制,透過網路傳輸高速優點改善傳輸速率以期望達到即時動態影像加解密的應用,並利用網路檔案系統(NFS)改善存取空間記憶體不足的地方。

    Advanced Encryption Standard (AES) algorithms are widely in research, in fact, the platform is not much to achieve in this research, the AES system with embedded Linux over the network actually do it, and applied to the image conversion, and system speed.
    In this research, the first using object-oriented software C # to write the AES algorithm, by way of doing this research and verify the AES cipher process, and the establishment of a complete AES application platform, including text, images and sound applications. In addition to software verification platform other than C #, this research also focused on the AES implementation on an embedded operating system environment, a small area of a 32-bit AES hardware architecture, implemented using the FPGA to AES embedded Linux systems, and increase the use of this architecture for image decryption applications. This architecture leverages the operating system to solve their predecessors in the transmission speed is too slow and memory space limitations, advantages of high speed transmission over the network to improve the transfer rate to expect to achieve real-time video encryption and decryption of the application, and use network file system (NFS) improve access to spatial memory deficiencies.

    摘 要.....................................................................................................................ii ABSTRACT .............................................................................................................. iii 誌 謝....................................................................................................................iv 目 錄.....................................................................................................................v 表 目 錄...................................................................................................................vii 圖 目 錄..................................................................................................................viii 第一章 緒論.........................................................................................................1 1.1 研究背景.................................................................................................1 1.2 研究動機.................................................................................................3 1.3 研究目的.................................................................................................4 1.4 研究步驟.................................................................................................5 第二章 AES 與嵌入式系統介紹..........................................................................6 2.1 AES 介紹.................................................................................................6 2.1.1 AES 演算法............................................................................................... 6 2.1.2 數學背景................................................................................................... 9 2.1.3 位元組取代轉換(SubBytes / InvSubBytes) ............................................ 10 2.1.4 移列轉換(ShiftRows / InvShiftRows)...................................................... 13 2.1.5 混行轉換(MixColumns / InvMixColumns) ............................................. 14 2.1.6 金鑰加法運算(AddRoundkey) ............................................................... 15 2.1.7 金鑰擴展(KeyExpansion)........................................................................ 16 2.2 嵌入式系統(Embedded System)............................................................19 2.2.1 MicroBlaze EDK 系統整合背景.......................................................... 21 2.2.2 MicroBlaze EDK 嵌入式軟體處理單元介紹...................................... 22 2.2.3 Microblaze EDK 設計流程................................................................... 24 2.2.4 Microblaze EDK 整合系統發展環境................................................... 28 第三章 文獻探討...............................................................................................30 3.1 32 位元AES 之MicroBlaze 架構........................................................30 3.2 8 位元AES 之PicoBlaze 架構.............................................................34 3.3 文獻比較...............................................................................................37 第四章 軟體模擬與AES 實現嵌入式作業系統設計........................................38 -vi- 4.1 C#軟體模擬實現AES 應用..................................................................38 4.2 32 位元AES 硬體電路.........................................................................47 4.2.1 AES IP 控制器設計.............................................................................. 49 4.3 嵌入式系統架構...................................................................................50 4.4 嵌入式作業系統規劃流程....................................................................52 4.4.1 網路檔案系統(NFS, Network File System) ............................................ 57 第五章 實驗結果分析........................................................................................59 5.1 驗證平台規劃.......................................................................................59 5.2 系統實驗結果與比較

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