本研究旨在於設計與合成一可植入於腦部之棘波分類晶片。根據植入於腦部的需求，晶片體積過大則會壓迫腦部，晶片功耗太高則會提高晶片溫度，如此必然會傷害到腦內細胞，因為以上兩個原因，此晶片設計將會著重於其面積以及功耗。
本研究提出以NEO運算法則為基底的棘波偵測器和以本論文提出之特徵擷取法則為基底的特徵擷取器，並藉由共享架構上的運算單元，進而設計出低功率、低面積的電路架構。本研究亦將電路實作於ASIC流程上，相較FPGA開發，ASIC在調整晶片的面積及功耗顯得更有彈性。為了降低功耗，本研究亦導入clock gating技術，進一步降低晶片的耗電量。
本論文於最後提出電路架構之分析，根據分析結果，選出數組參數進行面積及功耗分析。證明本研究設計之晶片比起其他現有的架構，有著非常突出的面積及功耗表現，並有著與現有架構差不多的分類效果。本論文也會簡單討論使用本架構之特徵擷取法與現有之PCA演算法、GHA演算法與Zero crossing演算法比較。

[1] Sarah Gibson,Jack W. Judy,and Dejan Markovic, "Spike Sorting: The first step in decoding the brain," IEEE Signal Processing Magazine, pp. 124-143, January 2012.
[2] D. N. Hill and D. Kleinfeld and S. B. Mehta, "Spike Sorting," in Observed Brain Dynamics, Oxford University Press, 2007, pp. 257-270.
[3] R. Quian Quiroga and Z. Nadasdy and Y. Ben-Shaul, "Unsupervised spike detection and sorting with wavelets and superparamagnetic clustering," Neural Computation, vol. 16, pp. 1661-1687, August 2004.
[4] Gosselin, B. and Ayoub, A.E. and Roy, J.-F. and Sawan, M. and Lepore, F. and Chaudhuri, A. and Guitton, D., "A Mixed-Signal Multichip Neural Recording Interface With Bandwidth Reduction," Biomedical Circuits and Systems, vol. 3, pp. 129-141, May 2009.
[5] J.F. Kaiser., "On a simple algorithm to calculate the `energy' of a signal," Acoustics, Speech, and Signal Processing, vol. 1, pp. 381-384.IEEE, April 1990.
[6] S. Mukhopadhyay and G.C. Ray, "A new interpretation of nonlinear energy operator and its efficacy in spike detection," Biomedical Engineering, vol. 45, pp. 180-187, February 1998.
[7] I.T. Jolliffe, Principal Component Analysis, 2nd ed., Springer-Verlag New York, 2002.
[8] Tung-Chien Chen and Wentai Liu and Liang-Gee Chen, "VLSI architecture of leading eigenvector generation for on-chip principal component analysis spike sorting system," Engineering in Medicine and Biology Society, pp. 3192-3195.IEEE, August 2008.
[9] Tung-Chien Chen and Kuanfu Chen and Zhi Yang and Cockerham, K. and Wentai Liu, "A biomedical multiprocessor SoC for closed-loop neuroprosthetic applications," Solid-State Circuits Conference - Digest of Technical Papers, pp. 434-435,435a.IEEE, February 2009.
[10] Terence D. Sanger, "Optimal unsupervised learning in a single-layer linear feedforward neural network," Neural Networks, vol. 2, pp. 459-473, April 1989.
[11] Simon O. Haykin, "Neural Networks and Learning Machines," 3rd ed., Prentice Hall, 2008.
[12] B. Yu , T. Mak , X. Li , F. Xia , A. Yakovlev , Y. Sun ,and C.-S. Poon, "Real-Time FPGA-Based Multichannel Spike Sorting Using Hebbian Eigenfilters," Emerging and Selected Topics in Circuits and Systems, vol. 1, pp. 502-515, January 2012.
[13] Wen-Jyi Hwang and Wei-Hao Lee and Shiow-Jyu Lin and Sheng-Ying Lai, "Efficient Architecture for Spike Sorting in Reconfigurable Hardware," Sensors, vol. 13, pp. 14860-14887, November 2013.
[14] Chi-En Ke, Efficient ASIC Architecture for Low-Power Multi-Channel Spike Sorting System, National Taiwan Normal University, 2014.
[15] Yin Zhou and Tong Wu and Amir Rastegarnia and Cuntai Guan and Edward Keefer and Zhi Yang, "On the robustness of EC-PC spike detection method for online neural recording," Journal of Neuroscience Methods, vol. 235, pp. 316-330, September 2014.
[16] Leslie S. Smith, "A tool for synthesizing spike trains with realistic interference," Journal of Neuroscience Methods, vol. 159, pp. 170-180, January 2007.
[17] 陳映綸, “NEO與GHA多通道棘波分類系統之低功率電路設計,” 2015.
[18] Wu, T.; Yang, Z., “Power-efficient VLSI implementation of a feature extraction engine for spike sorting in neural recording and signal processing,” pp. 7-12, December 2014.
[19] R. Quian Quiroga,Z. Nadasdy,Y. Ben-Shaul, "Unsupervised Spike Detection and Sorting with Wavelets and Superparamagnetic Clustering," NEURAL COMPUTATION, vol. 16, no. 8, pp. 1661-1687, August 2004.