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研究生： 洪鵬傑
論文名稱： 以多核心系統架構為基礎在可程式化系統晶片中實現島嶼式基因演算法
指導教授： 黃文吉
學位類別： 碩士
Master
系所名稱： 資訊工程學系
Department of Computer Science and Information Engineering
論文出版年： 2009
畢業學年度： 97
語文別： 中文
論文頁數： 55
中文關鍵詞： 分散式基因法則 、系統晶片設計 、多核心系統 、向量量化器
英文關鍵詞： Distributed GA, SOPC, Multi-core System, Vector Quantizers
論文種類： 學術論文
相關次數： 點閱：218  下載：2 
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    • 本研究為向量量化器的設計提出一個島嶼式(分散式)基因演算法的架構。研究中以多核心的系統架構為基礎，而為了獨立的基因演化過程，每一個島嶼分別都包含著一個硬體加速器以及一個softcore處理器。而島嶼之間的相互基因移民是採用一個共享的on-chip RAM，而這個on-chip RAM被一個硬體mutex給控制著以避免發生資料存取誤用。這樣為硬體實現分散式基因演算法提供了一個簡單以及具有彈性的移民機制。實驗數據顯示了我們所提出的硬體架構相對於其對應的軟體模擬系統擁有較低的計算時間。

    This thesis presents a novel distributed genetic algorithm (GA) architecture for the design of vector quantizers. The design is based on a multi-core architecture, where each island of the GA is associated with a hardware accelerator and a softcore processor for independent genetic evolutions. An on-chip RAM with a mutex circuit is adopted for the migration of genetic strings among different islands. This allows a simple and flexible migration for the implementation of hardware distributed GA. Experimental results shows that the proposed architecture has significantly lower computational time as compared with its software counterparts for GA-based optimization.

    中文摘要.......................................................................................................................Ⅰ 英文摘要.......................................................................................................................Ⅱ 目錄.............................................................................................................................Ⅳ 第一章 緒論................................................................................................................1 1.1 研究背景........................................................................................................1 1.2 研究動機及目的............................................................................................2 1.3 研究方法........................................................................................................4 1.4 全文架構........................................................................................................6 第二章 基礎理論及技術背景介紹............................................................................7 2.1 Steady-State GA應用於向量量化器之基本原理........................................7 2.2 基因演算法基本名詞及運算程序................................................................9 2.2.1 前言......................................................................................................9 2.2.2 基因演算法基本名詞定義..................................................................9 2.2.3 基因演算法運算程序........................................................................10 2.2.4 基因演算法收斂條件........................................................................14 2.2.5 基因演算法流程................................................................................14 2.3 島嶼式基因演算法…..................................................................................16 2.4 FPGA系統設計…......................................................................................18 第三章 系統架構......................................................................................................22 3.1 Steady-State GA 之硬體電路架構..............................................................22 3.1.1 族群記憶體單元(Population Memory Unit)......................................23 3.1.2 交配突變單元(Crossover & Mutation Unit)......................................24 3.1.3 適應值計算單元(Fitness Evaluation Unit) .......................................28 3.1.4 生存測試更新單元(Survival Test & Update Unit) ...........................31 3.2 Island GA架構中每一個島嶼模組架構…................................................34 3.3 島嶼式基因演算法之系統架構..................................................................37 第四章 實驗數據與效能比較..................................................................................40 4.1 開發平台與實驗環境介紹..........................................................................40 4.2 實驗數據的呈現與討論..............................................................................45 第五章 結論與未來展望..........................................................................................53 參考著作......................................................................................................................54

    [1] Mitchell, M., An introduction to Genetic Algorithm, MIT press, 1996.
    [2] Eiben, A. E., and Smith, J. D., Introduction to Evolutionary Computing, Springer, 2003.
    [3] Fogel, L. J., Owens, A. J. and Walsh, M. J., Artificial Intelligence Through Simulated Evolution, New York: Wiley, 1996.
    [4] Gersho, A., and Gray, R. M., Vector Quantization and Signal Compression, Kluwer, Norwood, Massachusetts, 1992.
    [5] Scheunders, S., “A genetic c-means clustering algorithm applied to color image quantization,” Pattern Recognition, Vol. 30, 6, pp. 859-866, 1997.
    [6] Hwang, W. j., and Hong, S. L., “Genetic entropy-constrained vector quantization,” Optical Engineering, Vol. 38, pp.233-239, 1999.
    [7] Rasheed, K., and Davisson, B.D., “Effect of global parallelism on the behave of a steady state genetic algorithm for design optimization,” In Proceedings of the Congress on Evolutionary Computation, Washington, DC, 1999.
    [8] Hauck, S., and Dehon, A., Reconfigurable Computing, Morgan Kaufmann, 2008.
    [9] NIOS II Processor Reference Handbook, 2008, Altera Corporation. http://www.altera.com/ literature/ lit-nio2.jsp.

    [10] Barry, S., Motoo, T., Richard, J.C., Greg, S., “FPGA Implementation of Neighborhood of Four Cellular Automata Random Number Generators ” ,HP Laboratories Palo Alto.HPL-2001-290,2001
    [11] Hwang, W.J., Li, H.Y., Yeh, Y.J. and Chan, K.F., “FPGA Implementation of
    Competitive Learning with Partial Distance Search in theWavelet Domain ” Chap.8 of the Book Progress in Neurocomputing Research, Edited by G. B. Kang, pp.203-221, NOVA Science Publisher, 2008.
    [12] Stratix II Device Handbook, 2008, Altera Corporation. http:// www.altera.com/
    literature/ lit-nio2.jsp.
    [13] Hutton, M., et al, “Improving FPGA Performance and Area Using an Adaptive
    Logic Module," Lecture Notes in Computer Science, vol. 3203, FPL 2004, pp.135-144, 2004.
    [14] NIOS II Processor Reference Handbook, 2008, Altera Corporation.
    http://www.altera.com/ literature/ lit-nio2.jsp.
    [15] Embedded Peripherals Reference Handbook, DMA controller core, 2008,
    Altera Corporation. http://www.altera.com/ literature/ lit-nio2.jsp.

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