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研究生： 黃望龍
Huang, Wang-Lung
論文名稱： X頻帶互補式金氧半功率放大器設計與實現
Design and Implementation of X-band CMOS Power Amplifiers
指導教授： 蔡政翰
Tsai, Jen-Han
學位類別： 碩士
Master
系所名稱： 電機工程學系
Department of Electrical Engineering
論文出版年： 2015
畢業學年度： 103
語文別： 中文
論文頁數： 137
中文關鍵詞： X頻段 、功率放大器 、變壓器 、互補式金氧化半 、功率合成技術
英文關鍵詞： X-band, power amplifier, transformer, CMOS, power combining techniques
論文種類： 學術論文
相關次數： 點閱：133  下載：12 
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    • 對於射頻收發器系統來說，功率放大器扮演著相當重要的角色，為了達到高輸出功率與高效率，現今，功率放大器的設計以砷化鎵製程(GaAs process)為主。近年來隨著CMOS的進步，射頻電路大部份已經成功整合至CMOS 製程當中，且CMOS具有低功率消耗、低成本、高整合度的優勢，因此本論文將設計及實現三個使用不同功率合成技術的X頻帶互補式金氧半功率放大器。
    第一個電路為變壓器功率合成技術之X頻段功率放大器，藉由變壓器實現功率合成而達到較高的輸出功率，量測增益("S" _"21" )為14.189 dB，飽和輸出功率("P" _"sat" )為24.74 dBm，1dB增益壓縮輸出功率(〖"OP" 〗_"1dB" )為16.63 dBm，最高功率附加效率(PAE)為19.9 %，晶片佈局面積為0.56 mm^2。
    第二個電路為串聯結合變壓器功率合成技術之X頻段功率放大器，藉由堆疊每一功率元件的電壓，進而抬高整體的輸出電壓及功率，量測增益("S" _"21" )為13.08 dB，飽和輸出功率("P" _"sat" )為26.3 dBm，1dB增益壓縮輸出功率(〖"OP" 〗_"1dB" )為23.3 dBm，最高功率附加效率(PAE)為12.6 %，晶片佈局面積為1.08 mm^2，。
    第三個電路為基於變壓器的電流合成技術之X頻段功率放大器，將兩組功率放大器元件直接並聯，藉此提高輸出功率，量測增益("S" _"21" )為13.4 dB，並達到27.3 dBm的飽和輸出功率("P" _"sat" )，23.84 dBm的1dB增益壓縮輸出功率(〖"OP" 〗_"1dB" )及19 %的最高功率附加效率(PAE) ，晶片佈局面積為1.27 mm^2。

    Power amplifier (PA) plays an important role in the RF transceiver. Generally, the radio frequency power amplifiers are implemented in GaAs technology for the higher power and efficiency. Recently, the RF circuits have been successfully integrated into the Complementary Metal-Oxide Semiconductor (CMOS) process and CMOS is attractive for low power consumption, low cost and systems-on-a-chip (SoC) applications. Therefore, this thesis designs and implements three X-band CMOS PAs using different power combining techniques.
    First, an X-band CMOS PA with transformer power combining technique has been designed and implemented. To achieve the higher output power, we utilizing the transformer to implement the power combining. The PA achieves measured small-signal gain("S" _"21" ) is 14.189 dB and maximum saturation output power("P" _"sat" ) is 24.74 dBm. The measured output 1-dB compression point (〖"OP" 〗_"1dB" )is 16.63 dBm and peak power-added efficiency (PAE) is 19.9 %. The chip area is 0.56 mm^2.
    Second, for higher output power and efficiency, an X-band CMOS PA using series combining transformer to accumulate the voltage of each power device for boosting the output voltage and power has been designed and fabricated. The PA demonstrates a "S" _"21" of 13.08 dB, "P" _"sat" of 26.3 dBm, 〖"OP" 〗_"1dB" of 23.3 dBm and peak PAE of 12.6 %. The chip area is 1.08 mm^2.
    Finally, an X-band CMOS PA based on transformer utilizes current combining technique, utilizing the current to connect two pairs of power amplifier for higher output power. The PA demonstrates a "S" _"21" of 13.4 dB, "P" _"sat" of 27.3 dBm, 〖"OP" 〗_"1dB" of 23.84 dBm and peak PAE of 19 %. The chip area is 1.27 mm^2.

    摘 要 I ABSTRACT III 誌謝 V 目 錄 VII 圖 目 錄 XI 表 目 錄 XIX 第一章 緒論 1 1.1 研究背景與動機 1 1.2 文獻探討 1 1.3 研究成果 3 1.4 論文架構 4 第二章 功率放大器基本介紹 7 2.1 概述 7 2.2 功率放大器之重要參數設計 8 2.2.1 功率(Power) 8 2.2.2 效率(Efficiency) 9 2.2.3 線性度(Linearity) 9 2.3 功率放大器種類 14 2.3.1 A類(Class A)功率放大器 14 2.3.2 B類(Class B)功率放大器 15 2.3.3 AB類(Class AB)功率放大器 16 2.3.4 C類(Class C)功率放大器 17 第三章 使用變壓器功率合成技術之X頻段功率放大器設計 19 3.1 簡介 19 3.2 變壓器功率合成技術之X頻段功率放大器設計 20 3.2.1 偏壓分析與選擇 20 3.2.2 電晶體元件尺寸分析及選擇 22 3.2.3 功率放大器組態選擇 24 3.2.4 變壓器原理 30 3.2.5 變壓器設計 31 3.2.6 旁路電路設計 47 3.3 X頻帶功率放大器模擬結果 50 3.4 量測結果 54 3.5 結果與討論 60 3.6 總結 65 第四章 使用串聯結合變壓器功率合成技術之X頻段功率放大器設計 67 4.1 簡介 67 4.2 使用串聯結合變壓器功率合成技術之X頻段功率放大器設計 68 4.2.1 串聯結合變壓器簡介 68 4.2.2 變壓器設計 69 4.3 串聯結合變壓器功率放大器模擬結果 85 4.4 量測結果 89 4.5 結果與討論 99 4.6 總結 102 第五章 基於變壓器的電流合成技術之X頻段功率放大器設計 103 5.1 簡介 103 5.2 基於變壓器的電流合成技術之X頻段功率放大器設計 103 5.2.1 基於變壓器的電流合成技術簡介 103 5.2.2 變壓器設計 106 5.3 X頻帶功率放大器模擬結果 115 5.4 量測結果 119 5.5 結果與討論 125 5.6 總結 129 第六章 結論 131 參　考　文　獻 133 自傳 137 學術成就 137

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