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研究生: 顏采庭
Yen, Tsai-Ting
論文名稱: 彩色電子紙之半色調影像處理晶片設計
Chip Design of Video Halftoning for Color Electronic Paper
指導教授: 高文忠
Kao, Wen-Chung
口試委員: 范育成
FAN, YU-CHENG
高文忠
Kao, Wen-Chung
林政宏
Lin, Cheng-Hung
口試日期: 2023/10/06
學位類別: 碩士
Master
系所名稱: 電機工程學系
Department of Electrical Engineering
論文出版年: 2023
畢業學年度: 112
語文別: 中文
論文頁數: 56
中文關鍵詞: 彩色電子紙直接二元搜尋影片半色調硬體設計影像處理晶片
英文關鍵詞: Color electronic paper, Direct binary search, Video halftoning, Hardware design, Image processing chip
研究方法: 實驗設計法
DOI URL: http://doi.org/10.6345/NTNU202301780
論文種類: 學術論文
相關次數: 點閱:192下載:61
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  • 本論文探討彩色電子紙在應用半色調影像處理演算法上所遇到的兩個難題,第一個是電子紙平台使用低功耗微控制器難以實現即時影像處理,第二個問題是直接二進制搜尋演算法在減少影片播放時畫面閃爍方面取得了良好效果,但其時間複雜度仍然很高,這使得在現有的電子紙平台上實現該演算法仍然存在困難。為了解決這一問題,本論文提出了一種基於彩色電子紙半色調影像處理的平行化硬體架構,以及一種新的像素搜索次序矩陣。該硬體架構具有良好的自適應性和可擴展性,可以自由地擴展或減少平行化的模塊,以滿足不同系統的需求。此外,該硬體架構已在晶片平台上實現,實驗結果表明該架構可以高效地執行即時影像處理,同時保持影像品質。

    This thesis addresses two issues encountered in the application of halftone image processing algorithms on color e-paper. The first challenge is that on e-paper platforms, it is difficult to achieve real-time image processing using low-power microcontrollers. The second issue is its time complexity remains high, making it still challenging to implement this algorithm on existing e-paper platforms. To tackle these problems, this thesis proposes a parallelized hardware architecture for halftone image processing on color e-paper, along with a novel pixel search order matrix. This hardware architecture exhibits excellent adaptability and scalability, allowing for flexible expansion or reduction of parallelized modules to meet the equirements of different systems. Furthermore, the proposed hardware architecture has been implemented on a chip platform, and experimental results demonstrate its efficient execution of real-time image processing while maintaining image quality.

    誌謝 i 摘要 ii ABSTRACT iii 目錄 iv 表目錄 vi 圖目錄 vii 第一章 緒論 1 1.1 研究背景 1 1.2 研究問題及目的 4 1.3 論文架構 5 第二章 文獻探討 6 2.1 靜態圖像的迭代半色調 8 2.2 圖像序列的迭代半色調 10 2.3 考慮彩色濾光陣列的圖像序列迭代半色調 12 2.3.1 CFADBS中的快速半色調畫面收斂策略 13 2.3.2 CFADBS演算法與CFA排列的影響 15 2.4 影像處理硬體架構 20 第三章 研究方法 23 3.1 基於Bayer矩陣的並行處理優化技術 23 3.2 彩色電子紙影片播放半色調演算法晶片架構設計 27 3.3 各模組架構介紹 31 3.3.1 CFA Circuit模組中的像素選擇與排列對應 31 3.3.2 Convolution Based On CFA Pattern中的感知誤差計算 34 3.3.3 實現高效切換收斂的DBS Macro Block模組 36 第四章 實驗結果 41 4.1 實驗環境與設備 41 4.2 畫面結果呈現 42 4.3 彩色電子紙之半色調影像處理平行化晶片效能分析 47 第五章 結論及未來展望 50 參考文獻 51 附錄 54 自傳 55 學術成就 56

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    Demo video of the method described in this thesis on E-paper: https://youtu.be/2OanZKgyFlo

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