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研究生: 謝達人
Hsieh,Ta-Jen,T J Hsieh
論文名稱: 主機板中央處理器電源電路暫態之測量與改善------以7號插槽架構系統為例
A Measurement and Improvement of PowerSupply Circuit Transient on Motherboard----An Example Using Socket7 Architecture System
指導教授: 楊維楨
Yang, Wei-Zhen
何宏發
Ho, Hong-Fa
學位類別: 碩士
Master
系所名稱: 工業教育學系
Department of Industrial Education
畢業學年度: 87
語文別: 中文
論文頁數: 53
中文關鍵詞: 基礎架構暫態脈寬調變電壓調整器交換式電源供應器體電容去耦合電容等效串接電阻等效串接電感電磁輻射干擾及相容性微條共面波導鈴振
英文關鍵詞: infrastructure, transient, PWM regulator, ringing, switching power supply, de-coupling capacitor, ESR, ESL, EMI&EMC, micro-strip, CPW, bulk capacitor
論文種類: 學術論文
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  • 中文摘要
    本研究在於提出藉由討論及實驗之趨近法,提出由主機板上直流對直流脈衝寬度調變電壓調整器輸出端之中央處理單元所量得的切換暫態之改良方案,以達成穩定及改良線路可靠度之目的,而求得一趨近較佳表現微算系統暫態之基礎架構。
    本研究由主機板上之脈衝寬度調變電壓調整器之切換特徵,分析暫態波形,並從推動級輸出電路之等效電感,電容之等效電阻及體電容、去耦合電容推導並實驗對中央處理器核心輸入電壓暫態之改善。以實際主機板基礎進出程式操控中央處理器之電源節省模式稱為停止同意狀態,並測量此時對電路所產生之暫態振鈴效應,由理論實驗及實驗之趨近,透過最簡化的工程手法達到改善暫態響應之目的。
    結論:
    一、 量測方法,及測試點應作討論並確認以求得實驗的正確性與一致
    性。
    二、脈衝寬度調變電壓調整器雖有不同之設計及回授。惟對主機板核
    心交換式電源供應器輸出端改良即可達到抑制暫態之目的。在實
    際工程上為最簡單經濟的改善方案。
    三、由增加體電容及改變耦合電容位置以降低等效串接電阻及減少等
    效串接電感之效應即可有效的改善主機板中央處理器電源電路之
    暫態。
    後續研究建議:
    一、 工程角度的改良方案以經濟有效為目的,然而上述方法仍可能未
    完全改善暫態。乃源於印刷電路板之佈線及貫孔之雜散電容及寄
    生電感效應,仍有待進一步之研究及探討。尤其在電路佈局設計
    及元件及貫孔位置規劃實體考量上,如何避免產生等效寄生電
    感效應之最佳化設計,可就此領域作再深入之探究。
    二、如何從脈寬調變電路設計方向改良暫態響應及抑制鈴振仍具有極
    大討論空間。
    三、此種主機板上之線路之電磁輻射干擾及其相容性設計及微條等效
    電路及共面波導效應之研究,亦可為相關研究之課題。
    關鍵字:基礎架構、暫態、脈寬調變電壓調整器、鈴振、交換式電源供應器、 體電容、去耦合電容、等效串接電阻、等效串接電感、電磁輻射干擾及相容性、微條、共面波導

    ABSTRACT
    This study proposes an approach on the improving of switching
    transient output voltage to CPU on the mother board on board DC-to-DC
    PWM voltage regulator. Via the discussion and experiment we find a
    solution on the purpose of improving the circuit reliability and stability. Hence the deduction comes to an approximated enhanced Infrastructure of better performance microcomputer system.
    Through the switching characteristics of Pulse Width Modulating
    Regulator, this study shows the analysis of the transient waveform and infers
    to the improvement from the experiment and electronic circuit theory. The
    discussion on related driving output CKT ESL, capacitor ESR and Bulk
    capacitor , decoupling capacitor are deduced to the improvement of CPU
    core voltage (Vcc2) input voltage transient.
    Via the controlling of the mother board BIOS to set CPU power saving, clock control Mode which is one of the five modes called Stop Grant State, the measurement shows the transient and ringing effect under this condition. Hence the most simplified engineering approaching based on the theory and experiment of circuit is done to achieve the purpose of improving the transient response with the economic on board solution.
    Conclusion:
    1. To achieve the accuracy and consistency of experiment, the measuring methodology/procedure and the test point of DUT (Device Under Test) should be considered into the assumption and discussion and confirm the test points and the steps in process as well.
    2. Owing that PWM, Pulse Width Modulation regulator, has the different ways of designing and feed-back circuitry, Yet still could we found an improvement on the output port to the mother board Vcc2 (Vcore) of the on-board switching power supply to suppress the transient response to meet the CPU spec. Which is also an most economical as well as simplified improving solution in practical engineering.
    3. Hence the effectively improving approach of Mother Board CPU
    switching power regulator/supply transient response can be reached through the additional bulk capacitors to mainly reduce the ESR and changing the pop location of de-coupling capacitor to mainly reduce the ESL effect.
    Further study suggestion:
    1. From the aspect of engineering, the most of the solutions are supposed to be effective and economic ; However, all these stated above approaching are not optimized at all on he improving of the transient of the mother board. One of the reasons is that the effect from PCB layout and routing along with the effect of distributed capacitor and the parasitic inductance of via. Which can be taken as an issue for the further study and discussion on that. The related field could be researched more and in depth as the physical planned consideration of the PCB layout design and placement of the components and vias in the ways of how to optimize the design in preventing the equivalent series parasitic inductance effect.
    2. There is also remaining a large space in the approaching from how to design the on board PWM CKT for improving the transient response and the suppressing of ringing.
    3. Also a more advanced topics can be researched on the EMI and EMC solution of main board circuitry designing along with the researching on PCB effect of equivalent Micro-strip CKT or CPW.
    Keywords: infrastructure, transient, PWM regulator, ringing, switching power supply, bulk capacitor, de-coupling capacitor, ESR., ESL, EMI&EMC, micro-strip, CPW.

    目錄 謝誌----------------------------------------------------------------------------------I 中文摘要---------------------------------------------------------------------------II 英文摘要--------------------------------------------------------------------------IV 目錄--------------------------------------------------------------------------------VII 圖目錄------------------------------------------------------------------------------IX 表目錄------------------------------------------------------------------------------XI 第一章 緒論------------------------------------------------------------------------1 1-1動機------------------------------------------------------------------------------1 1-2研究流程方法及結構--------------------------------------------------------2 1-3範圍及限制---------------------------------------------------------------------4 1-4貢獻-------------------------------------------------------------------------------5 第二章 文獻討論及理論基礎---------------------------------------------------6 2-1主機板中央處理器雙電源架構---------------------------------------------6 2-2中央處理器及電源平面設計的一些考量--------------------------------8 2-3交換式調整變壓器原理-----------------------------------------------------11 2-4時脈停止訊號------------------------------------------------------------------15 2-7時脈訊號控制省電模式------------------------------------------------------16 2-6實驗設計-------------------------------------------------------------------------16 2-7元件及基板----------------------------------------------------------------------18 第三章 量測法與比較-------------------------------------------------------------21 3-1無限累積模式與即時連續模式--------------------------------------------- 21 3-2測試頻寬之考量-----------------------------------------------------------------24 3-3不同CPU操作頻率的負載效應-------------------------------------------- 25 3-4電腦主機操作模式及中央處理器暫態產生模式-----------------------26 3-5討論---------------------------------------------------------------------------------31 第四章 實驗與改良-----------------------------------------------------------------32 4-1量測結果--------------------------------------------------------------------------32 4-2實作改善--------------------------------------------------------------------------40 4-3理論趨近及實驗結果之探討-------------------------------------------------41 4-4實驗--------------------------------------------------------------------------------46 第五章 結論--------------------------------------------------------------------------49 5-1解決方案--------------------------------------------------------------------------49 5-2進一步的研究建議-------------------------------------------------------------50 參考文獻-------------------------------------------------------------------------------52

    參考文獻
    中文部分:
    [1] 木宗正,民75,再版,高頻電路設計實例,全華圖書,臺
    北,P16。
    [2]王國詮,民79,多層印刷電路板基本技術與用語解釋,臺
    北,P56。
    [2] 何中庸,民84,電子電路故障排除技術手冊,全華圖書
    ,臺北,P 17,P120。
    [3] 何宗喻,民82,多組輸出交換式電源供應器之EMI濾波
    器分析與設計,台大電機研究所,碩士論文,P9,P22。
    [5]張永輝,民74,印刷電路的設計與繪圖,徐氏圖書,臺北,P278~283。
    [6]蔡錦福,民73,類比電路故障分析與檢修,全華圖書
    ,臺北,P100,148,236,238。
    [7]賴致平,民84,大電流直流電源的設計製作及其電磁干擾現象分析,台大電機研究所,碩士論文,P36~37。
    英文部分:
    [8]AMD, 1999/5, mobile k6 processor power supply design
    application note, publication #21677, USA,pp13~14.
    [9]AMD,1998, k6-2 Processor Datasheet,USA,
    p115,p164,p225,p230,p232,p238,p274
    [10]AMD. Processor Power Supply Design Application
    Note,order# 21103,USA,P14,19.
    [11]Don Drapper et al "Circuit Technology in a 266-MHz
    MMX-Enabled Processor" IEEE J. Solid-State Circuit, vol. 32
    No.11 pp1650-1664, Nov.1997.
    [12] http://www.amd.com/K6/k6docs/
    [13]http://www.amd.com/products/cpg/cpg.html
    [14]http://www1.amd.com/K6/k6mbl/
    [15]http://www.cherrysemiconductor.com/
    [16]http://products.analog.com/products/info.asp?product=ADP 3152
    [17]Tektronix, 1999,Technical Reference 071-0135-00,USA.
    [18]Tektronix, 1995, Reference Book 070938200,USA.
    [19]Tektronix, 1995, Reference Book 070940800,USA.

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