本研究主要是探討將La摻入ZrO2薄膜的影響，也就是研究高介電極薄氧化層薄膜ZrLaO的電性以期能應用在邏輯電路的科技上。本研究之薄膜是利用射頻濺鍍以及直流濺鍍系統將氧化鋯 (ZrO2)以及鑭金屬 (La)兩種靶材共鍍下所製備而成。純的ZrO2薄膜在沉積完薄膜後再進行650°C與 850°C在氮氣中的快速熱退火，之後再將鋁電極鍍上，使其成為MOS電容器結構後，比較其在不同的退火溫度下所表現出來的特性，試片皆有以橢圓儀以及高解析度的穿透式電子顯微鏡來獲得薄膜的物理厚度。透過X光繞射分析來獲得ZrO2以及ZrLaO薄膜在退火後是否有結晶相產生。電性方面，本實驗有量測許多薄膜的電性數據包括在不同的量測溫度下所得到的漏電流值、由C-V所得之介電係數、平帶電壓的偏移量、薄膜的漏電流傳導機制以及蕭基能障等。

This study is mainly to investigate the La doping effect on the electrical properties of ultra-thin La-doped ZrO2 (denoted by ZrLaO) films for high-k gate dielectric applications of advanced logic technologies. In this work, ZrLaO films were co-deposited on p-type Si wafers by RF magnetron sputtering in the Ar ambient at room temperature, where ZrO2 and La targets utilized RF power and DC power, respectively, for sputtering. For comparison, ZrO2 films of similar physical thickness were also independently formed on Si wafers. A post-deposition annealing (PDA) was then performed in N2 ambient at 650℃ and 850℃. To form MOS structures, Al was sputtered as the top electrode, followed by annealing at 400℃ in N2. The film thickness was determined by ellipsometry and high-resolution transmission electron microscopy (HRTEM). The crystallization phase of ZrO2 and ZrLaO after PDA was investigated by X-ray diffraction (XRD). The electrical properties of ZrO2 with or without La incorporation were also analyzed and compared, including leakage current measured at 300-450 K, dielectric constant, flat-band voltage shift, current conduction behavior, and Schottky barrier height.

[1] S. M. Sze and K. K. Ng, Physics of Semiconductor Devices, 3rd ed. (Wiley, New York, 2007).
[2] R. H. Dennard, F. H. Gaensslen, H. N. Yu, V. L. Rideout, E Bassous, and R. Leblanc, “Design of ion-implanted MOSFET’s with very small physical dimensions”, IEEE J. Solid-State Circuits SC-9, 256 (1974).
[3] C. Y. Wong, J. Y. C. Sun, Y. Taur, C. S. Oh, R. Angelucci, and B. Davari, “Doping of n+ and p+ polysilicon in a dual-gate CMOS process”, IEDM Tech. Digest, 238(1988).
[4] K. T. Kim, L. G. Kang, T. S. Park, Y. S. Shin, J. K. Park, C. J. Lee, C. G. Hwang, D. Chin, and Y. E.Park, “Tungsten silicide/titanium nitride compound gate for submicron CMOSFET”, Tech. Dig. VLSI Symp., 115 (1990).
[5] 劉傳璽、陳進來，“半導體物理元件與製程-理論與實務”，五南文化出版社，(2006)。
[6] G. D. Wilk, R. M. Wallace, and J. M. Anthony, “High-k gate dielectrics: Current status and materials properties considerations”, J. Appl. Phys. 89, 5243 (2001).
[7] J. L. Moll, “Variable capacitance with large capacity change”, IRE Wescon Conv. Rec, pt. 3, 32 (1959).
[8] W. G. Pfann and C. G. B. Garrett, “Semiconductor varactors using surface space-charge layers”, Proc. IRE 47, 2011 (1959).
[9] M. Atalla and D. Khang, “A new "Hot electron" triode structure with semiconductor-metal emitter”, IEEE Trans. Electron Devices ED-9, 507 (1962)
[10] D. A. Buchanan, “Scaling the gate dielectric: Materials, integration, and reliability”, IBM J. Res. Dev. 43, 245 (1999).
[11] W. J. Qi, R. Nieh, E. Dharmarajan, B. H. Lee, Y. Jeon, L. Kang, K. Onishi, and J. C. Lee, “Ultrathin zirconium silicate film with good thermal stability for alternative gate dielectric application”, Appl. Phys. Lett. 77, 1704 (2000).
[12] B. E. Deal, “Standardized terminology for oxide charges associated with thermally oxidized silicon”, IEEE Trans. Electron Devices ED-27, 606 (1980).
[13] B. E. Deal, “Characteristics of the surface-state charge of thermally oxidized silicon”, M. Sklar, A. S. Grove, and E. H. Snow, J. Electrochem. Soc. 114, 266 (1967).
[14] A. Chin, Y. H. Wu, S. B. Chen, C. C. Liao, and W. J. Chen, “High quality La2O3 and A12O3 gate dielectrics with equivalent oxide thickness 5-10 Å”, Tech. Dig. VLSI Symp., 16 (2000).
[15] H. Iwai, S. Ohmi, S. Akama, C. Ohshima, A. Kikuchi, I. Kashiwagi, J. Taguchi, H. Yamamoto, J. Tonotani, Y. Kim, I. Ueda, A. Kashyama, and Y. Yoshihara, “Advanced gate dielectric materials for sub-100 nm CMOS”, IEDM Tech. Digest, 625 (2002).
[16] Y. H. Wu, M. Y. Yang, A. Chin, W. J. Chen, and C. M. Kwei, “Electrical characteristics of high quality La2O3 gate dielectric with equivalent oxide thickness of 5 Å”, IEEE Electron Device Lett. 21, 341 (2000).
[17] A. Prokofiev, A. I. Shelykh, and B. T. Melekh, “Periodicity in the band gap variation of Ln2X3 (X = O, S, Se) in the lanthanide series”, J. Alloys Compd. 242, 41 (1996).

[18] Y. Zhao, M. Toyama, K. Kita, K. Kyuno, and A. Toriumi, “Moisture-absorption-induced permittivity deterioration and surface roughness enhancement of lanthanum oxide films on silicon”, Appl. Phys. Lett. 88, 072904 (2006).
[19] Y. Li, J. Zhu, H. Liu, and Z. Liu, “Fabrication and characterization of Zr-rich Zr-aluminate films for high-k gate dielectric applications”, Microelectron. Eng. 83, 1905 (2006).
[20] E. P. Gusev, M. Copel, E. Cartier, I. J. R. Baumvol, C. Krug, and M. A. Gribelyuk, “High-resolution depth profiling in ultrathin Al2O3 films on Si”, Appl. Phys. Lett. 76, 176 (2000).
[21] S. A. B. Nasrallah, A. Bouazra, A. Poncet, and M. Said, “Gate leakage properties in (Al2O3/HfO2/Al2O3) dielectric of MOS devices”, Thin Solid Films 517, 456 (2008).
[22] F. C. Chiu, S. Y. Chen, C. H. Chen, H. W. Chen, H. S. Huang, and H. L. Hwang, “Interfacial and electrical characterization in metal oxide semiconductor field-effect transistors with CeO2 gate Dielectric“, Jnp. J. Appl. Phys. 48, 04C014 (2009).
[23] J. Lappalainen, H. L. Tuller, and V. Lantt, “Electronic conductivity and dielectric properties of nanocrystalline CeO2 Films”, J. Electron. 13, 129 (2004).
[24] J. Lappalainena, D. Kekb, and H. L. Tullerb, “High carrier density CeO2 dielectrics—implications for MOS devices”, J. Eur. Ceram. Soc. 24, 1459 (2004).
[25] T. Yamamoto, H. Momida, T. Hamada, T. Udab, and T. Ohno, “First-principles study of dielectric properties of cerium oxide”, Thin Solid Films 486, 136 (2005).
[26] M. T. Ta, D. Briand, Y. Guhel, J. Bernard, J. C. Pesant, and B. Boudart, “Growth and structural characterization of cerium oxide thin films realized on Si(111) substrates by on-axis r.f. magnetron sputtering”, Thin Solid Films 517, 450 (2008).
[27] H. J. Quah, K. Y. Cheong, Z. Hassan, Z. Lockman, F. A. Jasni, and W. F. Lim, “Effects of postdeposition annealing in argon ambient on metallorganic decomposed CeO2 gate spin coated on silicon”, J. Electrochem. Soc. 157, H6 (2010).
[28] Y. Nishikawa, T. Yamaguchi, M. Yoshiki, H. Satake, and N. Fukushima, “Interfacial properties of single-crystalline CeO2 high-k gate dielectrics directly grown on Si (111)”, Appl. Phys. Lett. 81, 4386 (2002).
[29] H. J. Quah, K. Yew Cheong, Z. Hassan, and Z. Lockmana, “MOS characteristics of metallorganic-decomposed CeO2 spin-coated on GaN”, Electrochem. Solid-State Lett. 13, H116 (2010).
[30] K. Roh, S. Yang, B. Hong, and Y. Roh, “Structural and electrical properties of yttrium oxide with tungsten gate”, J. Korean Phys. Soc. 40, 103 (2002).
[31] P. S. Das, G. K. Dalapati, D. Z. Chi, A. Biswas, and C. K. Maiti, “Characterization of Y2O3 gate dielectric on n-GaAs substrates”, Appl. Surf. Sci. 256, 2245 (2009).
[32] R. H. Horng, D. S. Wuu, J. W. YU, and C. Y. Kung, “Effects of rapid thermal process on structural and electrical characteristics of Y2O3 thin films by r.f.-magnetron sputtering”, Thin Solid Films 289, 234 (1996).
[33] S. L. Jones, D. Kumar, Rajiv K. Singh, and P. H. Holloway, “Luminescence of pulsed laser deposited Eu doped yttrium oxide films”, Appl. Phys. Lett. 71, 404 (1997).
[34] K. Nakagawa, K. Miyauchi, K. Kakushima, T. Hattori, K. Tsutsui, and H. Iwai, “The effect of Y2O3 buffer layer for La2O3 gate dielectric film”, ESSDERC, 387 (2005).
[35] G. He, Q. Fang, M. Liu, L. Q. Zhu, and L. D. Zhang, “The structural and interfacial properties of HfO2/Si by the plasma oxidation of sputtered metallic Hf thin films”, J. Cryst. Growth 268, 155 (2004).
[36] M. Gutowski, J. E. Jaffe, C. L. Liu, M. Stoker, R. I. Hegde, R. S. Rai, and P. J. Tobin, “Thermodynamic stability of high-k dielectric metal oxides ZrO2 and HfO2 in contact with Si and SiO2”, Appl. Phys. Lett. 80, 1897 (2002).
[37] H. Kim, Paul C. McIntyre, and K. C. Saraswat, “Effects of crystallization on the electrical properties of ultrathin HfO2 dielectrics grown by atomic layer deposition”, Appl. Phys. Lett. 82, 106 (2003).
[38] B. H. Lee, L. Kang, W. J. Qi, R. Nieh, Y. Jeon, K. Onishi, and J. C. Lee, “Ultrathin hafnium oxide with low leakage and excellent reliability for alternative gate dielectric application”, IEDM Tech. Digest, 133 (1999).
[39] C. Y. Kang, P. D. Kirsch, B. H. Lee, H. H. Tseng, and R. Jammy, “Reliability of La-doped Hf-based dielectrics nMOSFETs”, IEEE Trans. Device Mater. Reliab. 9, 171 (2009).
[40] C. H. An, M. S. Lee, J. Y. Choi, and H. Kima, “Change of the trap energy levels of the atomic layer deposited HfLaOx films with different La concentration”, Appl. Phys. Lett. 94, 262901 (2009).
[41] G. D. Wilk, R. M. Wallace, and J. M. Anthony, “Hafnium and zirconium silicates for advanced gate dielectrics”, J. Appl. Phys. 87, 484 (2000).
[42] J. M. Gaskell, A. C. Jones, and H. C. Aspinall, “Deposition of lanthanum zirconium oxide high-k films by liquid injection atomic layer deposition”, Appl. Phys. Lett. 91, 112912 (2007).
[43] H. S. Choi, K. S. Seol, D. Y. Kim, and J. S. Kwak, “Thermal treatment effects on interfacial layer formation between ZrO2 thin films and Si substrates”, Vacuum 80, 310 (2005).
[44] C. H. Liu and F.C. Chiu, “Electrical characterization of ZrO2/Si Interface properties in MOSFETs with ZrO2 gate dielectrics”, IEEE Electron Device Lett. 26, 62 (2007).
[45] J. McPherson, J. Kim, A. Shanware, H. Mogul, and J. Rodriguez, “Proposed universal relationship between dielectric breakdown and dielectric constant”, IEDM Tech. Digest, 633 (2002).
[46] Y. Li, J. Zhu, H. Liu, and Z. Liu, “Fabrication and characterization of Zr-rich Zr-aluminate films for high-k gate dielectric applications”, Microelectron. Eng. 83, 1905 (2006).
[47] W. F. A. Besling, E. Young, T. Conard, C. Zhao, R. Carter, W. Vandervorst, M. Caymax, S. De Gendt, M. Heyns, J. Maes, M. Tuominen, and S. Haukka, “Characterisation of ALCVD Al2O3–ZrO2 nanolaminates link between electrical and structural properties”, J. Non-Cryst. Solids 303, 123 (2002).
[48] D. Tsoutsou, L. Lamagna, S. N. Volkos, A. Molle, S. Baldovino, S. Schamm, P. E. Coulon, and M. Fanciulli, “Atomic layer deposition of LaxZr1-xO2-δ high-k dielectrics for advanced gate stacks”, Appl. Phys. Lett. 94, 053504 (2009).
[49] P. M. Abdala, M. C. A. Fantini, A. F. Craievich, and D. G. Lamas, “Crystallite size-dependent phases in nanocrystalline ZrO2–Sc2O3”, Phys. Chem. Chem. Phys. 12, 2822 (2010).
[50] Z. N. Lin, W. Qing, S. Z. Tang, S. Q. Wo, Z. X. Rong, and L. C. Lu, “High-quality ZrO2 thin films deposited on silicon by high vacuum electron beam evaporation”, Chinese Phys. Lett. 19, 395 (2002).
[51] N. L. Zhang, Z. T. Song, Q. Wan, Q. W. Shen, and C. L. Lin, “Interfacial and microstructural properties of zirconium oxide thin films prepared directly on silicon”, Appl. Sur. Sci. 202, 126 (2002).
[52] K. J. Hubbard and D. G. Schlom, “Thermodynamic stability of binary oxides in contact with silicon”, J. Mater. Res. 11, 2757 (1996).
[53] W. J. Qi, R. Nieh, B. H. Lee, L. Kang, Y. Jeon, K. Onishi, T. Ngai, S. Banerjee, and J. C. Lee, “MOSCAP and MOSFET characteristics using Zr02 gate dielectric deposited directly on Si”, IEDM Tech. Digest, 145 (1999).
[54] Z. J. Luo, T. P. Ma, E. Cartier, M. Copel, T. Tamagawa, and B. Halpern, “Ultra-thin ZrO2 (or silicate) with high thermal stability for CMOS gate applications”, Tech. Dig. VLSI Symp., 16 (2000).
[55] Y. Ma, Y. Ono, L. Stecker, D. R. Evans, and S. T. Hsu, “Zirconium oxide based gate dielectrics with equivalent oxide thickness of less than 1.0 nm and performance of submicron MOSFET using a nitride gate replacement process”, IEDM Tech. Digest, 149 (1999).
[56] I. Jõgi, K. Kukli, M. Ritala, M. Leskelä, J. Aarik, A. Aidla, and J. Lu, “Atomic layer deposition of high capacitance density Ta2O5–ZrO2 based dielectrics for metal–insulator–metal structures”, Microelectron. Eng. 87, 144 (2010).
[57] M. Balog, M. Schieber, M. Michman, and S. Patai, “The chemical vapour deposition and characterization of ZrO2 films from organometallic compounds”, Thin Solid Films 47, 109 (1977).
[58] T. P. C. Juan, S. M. Chen, and J. Y. M. Lee, “Temperature dependence of the current conduction mechanisms in ferroelectric Pb(Zr0.53,Ti0.47)O3 thin films”, J. Appl. Phys. 95, 3120 (2004).
[59] C. H. Liu, H. W. Chen, S. Y. Chen, H. S. Huang, and L. W. Cheng,“Current conduction of 0.72 nm equivalent-oxide-thickness LaO/HfO2 stacked gate dielectrics”, Appl. Phys. Lett. 95, 012103 (2009).
[60] F. C. Chiu, Z. H. Lin, C. W. Chang, C. C. Wang, K. F. Chuang, C. Y. Huang, Y. Lee, and H. L. Hwang, “Electron conduction mechanism and band diagram of sputter-deposited Al/ZrO/Si structure”, J. Appl. Phys. 97, 034506 (2005).
[61] F. C. Chiu, “Interface characterization and carrier transportation in metal/HfO2/silicon structure”, J. Appl. Phys. 100, 114102 (2006).
[62] 羅正忠、張鼎張，“半導體製程技術導論”，台灣培生教育出版股份有限公司，(2009)。
[63] 白木靖寬、吉田貞史，“薄膜工程學”，全華科技圖書股份有限公司，(2006)。
[64] 行政院國家科學委員會，“真空技術與應用”，精密儀器發展中心出版，(2001)。
[65] M. Ohring, The Materials Science of Thin Film, 2nd ed. (Academic Press, San Diego, 2002).
[66] 王光明、王敏昭， “實用儀器分析”，合記圖書出版社，(2003)。
[67] 余樹楨，“晶體之結構與性質”，渤海堂文化事業有限公司，(1987)。
[68] 馬遠榮，“奈米科技”，商周出版，(2004)。
[69] D. K. Schroder, Semiconductor Material and Device Characterization, 3rd ed. (Wiley, New York, 2006).
[70] 汪建民，“材料分析”，中國材料科學學會，(2001)。