在過去的十年中，鐵電材料被作為熱門的研究題目之一，當鐵電應用在電晶體時，具有電壓放大、能降低次臨界斜率(SS)突破60mV/dec的極限和負電容特性 (Negative Capacitance, NC)，所以負電容也是FeFET應用中的重要課題。為了理解NC效應的頻率響應，我們在Hafnium–zirconium oxide (HZO)中配置了不同的Zr濃度，不同的電容器連接模式（並聯或串聯）以及不同的電容器面積，以提高負電容效應。兩種方法分別顯示了不同頻率測量下NC的影響，得到了以下兩個結論,第一個並聯使用兩個HZO電容器以增加HZO電容器的總電容； 第二個將高電容的HZO電容器與介電電容器串聯使用，以通過不同頻率C-V測量的NC效應獲得電容放大。我們研究了HZO基材料中三種Zr濃度（[Zr]=50％，75％，90％），以證明帶有FE和AFE電容器的NC的頻率響應。最後總結來說，並聯連接的HZO-Zr50％+ HZO-Zr75％可以在<30 kHZ的頻率下獲得更高的電容，這表明存在NC效應。
在記憶體的應用，基於鐵電HfO2閘極堆疊的鐵電場效電晶體（FeFET），具有穩定遲滯現象(Hysteresis)和非破壞性讀取的特性，可用於多級單元（MLC）操作的非揮發性記憶體（NVM）。矯頑電場（EC）和殘餘極化（Pr）都是鐵電薄膜改變FeFET閾值電壓（VT）的決定性參數。在這項工作中，採用HZO不同厚度和濃度的調控來實現每一個記憶單元下可存入2~3位元的NVM。
在成功做出記憶體之後，未來可能面臨的問題不外乎為記憶體可靠度的提升。我們知道當HZO中的Zr濃度為50％時，會形成典型的FE。從FE的遲滯曲線可以看出，極化可以在沒有外部電壓的情況下存儲，並且正向和反向掃描將有兩個閾值電壓（VT），可以將其定義為“ 0”和“ 1”以用於非揮發性記憶體。當Zr為75％時，它將變為AFE。在沒有電場的作用下，AFE的遲滯曲線在兩階之間顯示出很小的差異，因此不適合用於非揮發性記憶體。實驗的目的是使用高濃度Zr（75％）Hf0.25Zr0.75O2分別在上下電極使用不同功函數材料。由功函數差異產生的內建電場將AFE的遲滯曲線移位，因此完成不施加偏壓的即可產生非揮發性記憶體的特性，使AFE與FE有相同的記憶特性。進而我們可以使用較小範圍的電壓來操作記憶體，從而可以降低功耗並延長記憶體的使用壽命。

During the past decades, ferroelectric materials are one of the most promising research topics for advanced CMOS. As ferroelectric technology is applied for transistors, the voltage amplification, with subthreshold slope (SS) improvement for negative capacitance (NC) characteristics. In order to understand the frequency bandwidth of NC effect, the various Zr concentrations in HZO and capacitor connection modes (parallel or series) with ratio of area. The HZO-Zr50% + HZO-Zr75% in parallel connection has higher capacitance at the frequency < 30 kHZ and this indicating the NC effect.
Ferroelectric field effect transistor (FeFET) has also been studied due to non-destructive readout characteristics. The modulation of HZO thickness and Zr concentration is employed in this thesis to achieve Multi-Level Cell (MLC) non-volatile memory (NVM) of 2~3-bits each memory cell. The one of challenges for FeFET would be the reliability and power consumptions. The AFE may pave the solution due to a small range of acess voltage to operate memory and excellent reliability. However , the small or close to zero Pr at zero electric field, maybe the issue to using AFE in NVM application.. The last experiment part in my thesis is to use high-concentration Zr (75%) Hf0.25Zr0.75O2 capacitors with high and low work function materials electrodes to make built-in bias.

[1] M. Hoffmann, Franz P. G. Fengler, M. Herzig, T. Mittmann, B. Max, U. Schroeder, R. Negrea, P. Lucian, S. Slesazeck and T. Mikolajick, “Unveiling the Double-Well Energy Landscape in a Ferroelectric Layer,” Nano Letters, vol. 565, pp. 463-467, 2019.
[2] H. Palneedi, M. Peddigari, G.-T. Hwang, D.-Y. Jeong, J. Ryu, “High-Performance Dielectric Ceramic Films for Energy Storage Capacitors: Progress and Outlook,” Advanced Functional Materials, 2018, Vol. 28, Issue42, 1803665.
[3] T. S. Bösckea, J. Müllerb, D. Bräuhausc, U. Schröderd, and U. Böttgerc, “Ferroelectricity in Hafnium Oxide: CMOS Compatible Ferroelectric Field Effect Transistors, ” in IEDM, 2011, pp. 547-550
[4] M. K. Kim, I.J. Kim, S. J. Lee, “CMOS-compatible ferroelectric NAND flash memory for high-density, low-power, and high-speed three-dimensional memory,” Science Advances, 2021, Vol. 7, no. 3, eabe1341
[5] M. H. Park, T. Schenk, C. M. Fancher, E. D. Grimley, C. Zhou, C. Richter, J. M. LeBeau, J. L. Jones, T. Mikolajick and U. Schroeder, “A comprehensive study on the structural evolution of HfO2 thin films doped with various dopants,” J. Mater. Chem. C, 2017,5, 4677-4690
[6] T. Boescke, J. Heitmann, U. Schroder, “Integrated circuit with dielectric layer, ” US 7,709,359 B2, 2010 (Filing date 2007-09-05).
[7] T. S. Böscke, St. Teichert, D. Bräuhaus, J. Müller, U. Schröder, U. Böttger and T. Mikolajick, “Phase transitions in ferroelectric silicon doped hafnium oxide,’’ Appl. Phys. Lett., vol. 99, no. 11, 112904, 2011.
[8] J. Müller, T. S. Böscke, D. Bräuhaus, U. Schröder, U. Böttger, J. Sundqvist, P. Kücher, T. Mikolajick, and L. Frey, “Ferroelectric Zr0.5Hf0.5O2 thin films for nonvolatile memory applications,’’ Appl. Phys. Lett., vol. 99, iss. 11, 112901, 2011.
[9] J. Müller, U. Schröder, T. S. Böscke, I. Müller, U. Böttger, L. Wilde, J. Sundqvist, M. Lemberger, P. Kücher, T. Mikolajick, and L. Frey, “Ferroelectricity in yttrium-doped hafnium oxide,’’ J. Appl. Phys., vol. 110, no. 11, 114113, 2011.
[10] S. Müller, J. Müller, A. Singh1, S. Riedel, J. Sundqvist, U. Schroeder and T. Mikolajick, “Incipient Ferroelectricity in Al-Doped HfO2 Thin Films,’’, Adv. Funct. Mater., vol. 22, no. 11, pp. 2412-2417, June 6, 2012.
[11] T. Schenk, S. Mueller, U. Schroeder, R. Materlik, A. Kersch, M. Popovici, C. Adelmann, S. V. Elshocht and T. Mikolajick, “Strontium Doped Hafnium Oxide Thin Films: Wide Process Window for Ferroelectric Memories.” ESSDC., 2013. 6818868 .
[12] A. G. Chernikova, D. S. Kuzmichev, D. V. Negrov, M. G. Kozodaev, S. N. Polyakov, and A. M. Markeev., “Ferroelectric properties of full plasma-enhanced ALD TiN/La:HfO2/TiN stacks,” Appl. Phys. Lett., vol. 108, no. 24, 242905, 2016.
[13] S. Müller, H. Mulaosmanovic, S. Slesazeck, J. Müller, and T. Mikolajick, “CMOS Compatible Ferroelectric Devices for Beyond 1X nm Technology Nodes, ” in SSDM, 2017, pp. 539-540.
[14] T. S. Bösckea, J. Müllerb, D. Bräuhausc, U. Schröderd, and U. Böttgerc, “Ferroelectricity in Hafnium Oxide: CMOS compatible Ferroelectric Field Effect Transistors, ” in International Electron Device Meeting (IEDM), pp. 547-550, 2011.
[15] P. Polakowski, S. Riedel, W. Weinreich, M. Rudolf, J. Sundqvist, K. Seidel, and J. Müller, “Ferroelectric deep trench capacitors based on Al:HfO2 for 3D nonvolatile memory Applications, ” in IMW, 2014.
[16] C. H. Cheng and A. Chin, “Low-Leakage-Current DRAM-Like Memory Using a One-Transistor Ferroelectric MOSFET With a Hf-Based Gate Dielectric, ” IEEE Electron Device Letter, vol. 35, pp. 138-140, 2014.
[17] C. H. Cheng and A. Chin, “Low-Voltage Steep Turn-On pMOSFET Using Ferroelectric High-κ Gate Dielectric, ” IEEE Electron Device Letter, vol. 35, pp. 274-276, 2014.
[18] M. H. Park, H. J. Kim, Y. J. Kim, T. Moon,K. D. Kim, and C. S. Hwangn, “Toward a multifunctional monolithic device based on pyroelectricity and the electrocaloric effect of thin antiferroelectric HfxZr1-xO2 films, ” Nano Energy, vol. 12, pp. 131-140, 2015.
[19] Y. C. Chiu, C. H. Cheng, C. Y. Chang, M. H. Lee, H. H. Hsuand, and S. S. Yen, “Low Power 1T DRAM/NVM Versatile Memory Featuring Steep Sub-60-mV/decade Operation, Fast 20-ns Speed, and Robust 85oC-Extrapolated 1016 Endurance, ” in VLSI Technology Symp., pp. 184-185, 2015.
[20] S. Fujii, Y. Kamimuta, T. Ino, Y. Nakasaki, R. Takaishi, and M. Saitoh, “First demonstration and performance improvement of ferroelectric HfO2-based resistive switch with low operation current and intrinsic diode property, ” in VLSI Technology Symp., pp. 978-979, 2016.
[21] H. Mulaosmanovic, J. Ocker, S. Müller, M. Noack, J. Müller, P. Polakowski, T. Mikolajick, and S. Slesazeck, “Novel ferroelectric FET based synapse for neuromorphic systems, ” in VLSI Technology Symp., pp. 176-177, 2017.
[22] R. Eskandari, X. Zhang, and L. M. Malkinski, “Polarization-dependent photovoltaic effect in ferroelectric-semiconductor system, ” Applied Physics Letters, vol. 110, 121105, 2017.
[23] M. Dragoman, M. Aldrigo, M. Modreanu, and D. Dragoman, “Extraordinary tunability of high-frequency devices using Hf0.3Zr0.7O2 ferroelectric at very low applied voltages, ” Applied Physics Letters, vol. 110, p. 103104, 2017.
[24] J. V. Houdt, “Memory Technology for the Terabit Era: from 2D to 3D, ” in VLSI Technology Symp., pp. 978-979, 2017.
[25] S. W. Smith, A. R. Kitahara, M. A. Rodriguez, M. D. Henry, and M. T. Brumbach, and J. F. Ihlefeld, “Pyroelectric response in crystalline hafnium zirconium oxide (Hf1-xZrxO2) thin films, ” Applied Physics Letters, vol. 110, 072901, 2017.
[26] F. Huang, Y. Wang, X. Liang, J. Qin, Y. Zhang, X. Yuan, Z. Wang, B. Peng,L. Deng, and Q. Liu, “HfO2-Based Highly Stable Radiation-Immune Ferroelectric Memory, ” IEEE Electron Device Letter, vol. 38, pp. 330-333, 2017.
[27] A. Chen, “Nanoelectronic Device Research for beyond - CMOS Technologies, ” in “Emerging Technologies for the post 14nm Node Area, ” in IEEE IEDM short course, Dec. 8, 2012.
[28] Writam Banerjee, “Challenges and Applications of Emerging Nonvolatile Memory Devices, ” Multidisciplinary Digital Publishing Institute, Electronics 2020, 9, 1029
[29] S. Horita and B. N. Q. Trinh, “Nondestructive Readout of Ferroelectric-Gate Field-Effect Transistor Memory with an Intermediate Electrode by Using an Improved Operation Method,” IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 55, NO. 11, 2008
[30] W. Banerjee, “Challenges and Applications of Emerging Nonvolatile Memory Devices,” Electronics 2020, 9, 1029.
[31] Enlong Liu, “Materials and designs of magnetic tunnel junctions with perpendicular magnetic anisotropy for high-density memory applications, ” Ph.D Thesis, Faculty of Engineering Science, Arenberg doctoral school, November 2018
[32] S. L. Miller and P. J. McWhorter, “Physics of the Ferroelectric Nonvolatile Memory Field Effect Transistor, ” Journal of Applied Physics, 72, 5999, 1992.
[33] C.-Y. Liao, K.-Y. Hsiang, F.-C. Hsieh, S.-H. Chiang, S.-H. Chang, J.-H. Liu, C.-Y. Lin, T.-C. Chen, C.-S. Chang, and M. H. Lee, “Multibit Ferroelectric FET Based on Nonidentical Double HfZrO2 for High-Density Nonvolatile Memory, ” IEEE Electron Device Letters, Vol. 42, No. 4, pp. 617-620, April, 2021.
[34] H.-Y. Chen, L. Tang, L. Liu, Y.-H. Chen, H. Luo, X. Yuan, D. Zhang, “Significant improvement of ferroelectricity and reliability in Hf0.5Zr0.5O2 films by inserting an ultrathin Al2O3 buffer layer, ” Applied Surface Science,Vol. 542, 15 March 2021, 148737.
[35] A.L. Roytburd, S. Zhong, S.P. Alpay, Dielectric anomaly due to electrostatic coupling in ferroelectric-paraelectric bilayers and multilayers, Appl. Phys. Lett. 87 (2005), 092902.
[36] ]P. Zubko, N. Jecklin, A. Torres-Pardo, P. Aguado-Puente, A. Gloter, C. Lichtensteiger, J. Junquera, O. Stephan, J.M. Triscone, Electrostatic coupling and local structural distortions at interfaces in ferroelectric/paraelectric superlattices, Nano Lett. 12 (2012) 2846–2851
[37] J.L. Lin, Z.J. Wang, X. Zhao, Z.D. Zhang, Effect of SrRuO3 layer thickness on electrical properties of Pb(Zr0.52Ti0.48)O3/SrRuO3 superlattices, Ceram. Int. 46 (2020) 219328–219333.
[38] T. Ali, P. Polakowski, K. Kühnel, M. Czernohorsky, T. Kämpfe, M. Rudolph, B. Pätzold, D. Lehninger, F. Müller, R. Olivo, M. Lederer, R. Hoffmann, P. Steinke, K. Zimmermann, U. Mühle, K. Seidel, and J. Müller,“A Multilevel FeFET Memory Device based on Laminated HSO and HZO Ferroelectric Layers for High-Density Storage, ” in IEDM Tech. Dig., Dec. 2019
[39] H. Mulaosmanovic, E. T. Breyer, T. Mikolajick, and S. Slesazeck, “Ferroelectric FETs with 20-nm-thick HfO2 layer for large memory window and high performance,” IEEE Trans. Electron Devices, vol. 66, no. 9, pp. 3828–3833, Sep. 2019
[40] T. Mittmann, M. Materano, P. D. Lomenzo, M. H. Park, I. Stolichnov, M. Cavalieri, C. Zhou, C. Chung, J. L. Jones, T. Szyjka, M. Müller, A. Kersch, T. Mikolajick, and U. Schroeder, “Origin of ferroelectric phase in undoped HfO2 films deposited by sputtering,” Adv. Mater. Interfaces, vol. 6, no. 11, Apr. 2019, Art. no. 1900042
[41] H. J. Kim, M. H. Park, Y. J. Kim, Y. H. Lee, W. Jeon, T. Gwon, T. Moon, K. D. Kim, and C. S. Hwang, “Grain size engineering for ferroelectric Hf0.5Zr0.5O2 films by an insertion of Al2O3 interlayer,” Appl. Phys. Lett., vol. 105, no. 19, Nov. 2014, Art. no. 192903.
[42] A. T. Apostolov, I. N. Apostolova, J. M. Wesselinowa*, “Antiferroelectricity in ZrO2 and Ferroelectricity in Zr, Al, La Doped HfO2 Nanoparticles,” Advances in Materials Physics and Chemistry, Vol.10, No.2, February 2020.
[43] C. Zhao and J. J. Xiang*, “Atomic Layer Deposition (ALD) of Metal Gates for CMOS,” Appl. Sci. 2019, 9, 2388
[44] H. F. Dadgou, K. Endo, V. K. De, and K. Banerjee, “Grain-Orientation Induced Work Function Variation in Nanoscale Metal-Gate Transistors—Part II: Implications for Process, Device, and Circuit Design,” IEEE Transactions on Electron Devices, Vol: 57, Issue: 10, Oct. 2010.
[45] M. Ťapajna, A. Rosová, E. Dobročka, V. Štrbík, Š. Gaži, K. Fröhlich, P. Benko, L. Harmatha, C. Manke, and P. K. Baumann, “Work function thermal stability of RuO2-rich Ru–Si–O p-channel metal-oxide-semiconductor field-effect transistor gate electrodes,” Journal of Applied Physics 103, 073702 ,2008
[46] S. Salahuddin, and S. Datta, “Can the subthreshold swing in a classical FET be lowered below 60 mV/decade,” in IEDM Tech. Dig., pp. 693-696, 2008.
[47] A. Saeidi, F. Jazaeri, I. Stolichnov, C. C. Enz & A. M. Ionescu, “Negative Capacitance as Universal Digital and Analog Performance Booster for Complementary MOS Transistors,” Scientific Reports,2019,9:9105.
[48] G. Pahwa, “Evaluation of Ferroelectric Negative Capacitance Technology for RF and High Voltage Applications,” Master thesis of Electrical Engineering, Indian Institute of Technology Kanpur.